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TC58V64ADC - 64M-Bit CMOS NAND EPROM

Description

The TC58V64A is a single 3.3-V 64-Mbit (69,206,016) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes × 16 pages × 1024 blocks.

Features

  • Organization Memory cell array 528 × 16K × 8 Register 528 × 8 Page size 528 bytes Block size (8K + 512) bytes Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read Mode control Serial input/output, Command control Complies with the SmartMediaTM Electrical Specification and Data Format Specification issued by the SSFDC Forum.
  • Power supply VCC = 3.3 V ± 0.3 V Access time Cell array-register 25 µs max Serial Read cycle 50 ns min Operating current.

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Datasheet Details

Part number TC58V64ADC
Manufacturer Toshiba Semiconductor
File Size 715.29 KB
Description 64M-Bit CMOS NAND EPROM
Datasheet download datasheet TC58V64ADC Datasheet
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TC58V64ADC TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 64-MBIT (8M × 8 BITS) CMOS NAND E PROM (8M BYTE SmartMedia DESCRIPTION 2 TM ) The TC58V64A is a single 3.3-V 64-Mbit (69,206,016) bit NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as 528 bytes × 16 pages × 1024 blocks. The device has a 528-byte static register which allows program and read data to be transferred between the register and the memory cell array in 528-byte increments. The Erase operation is implemented in a single block unit (8 Kbytes + 512 bytes: 528 bytes × 16 pages). The TC58V64A is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for command inputs.
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